Description: Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures, Hardcover by Manna, Kanchan; Mathew, Jimson, ISBN 3030313093, ISBN-13 9783030313098, Like New Used, Free shipping in the US
This book covers various aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems. It gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling for NoC-based multicores. The authors describe the use of the Integer Line Programming (ILP) technique for smaller benchmarks and a Particle Swarm Optimization (PSO) to get a near optimal mapping and test schedule for bigger benchmarks. The PSO-based approach is also augmented with several innovative techniques to get the best possible solution. The tradeoff between performance (communication or test time) of the system and thermal-safety is also discussed, based on designer specifications.
- Provides a single-source reference to design and test for circuit and system-level approaches to (NoC) based multicore systems;
- Gives a complete account of the state-of-the-art and emerging techniques for near optimal mapping and test scheduling in (NoC) based multicore systems;
- Organizes chapters systematically and hierarchically, rather than in an ad hoc manner, covering aspects of optimization in design and testing of Network-on-Chip (NoC) based multicore systems.
Price: 67.02 USD
Location: Jessup, Maryland
End Time: 2025-01-15T23:36:42.000Z
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Book Title: Design and Test Strategies for 2D/3d Integration for Noc-Based Multicore Architectures
Number of Pages: Xii, 162 Pages
Language: English
Publisher: Springer International Publishing A&G
Publication Year: 2019
Topic: Systems Architecture / General, Electronics / Circuits / General, Electronics / General
Illustrator: Yes
Genre: Computers, Technology & Engineering
Item Weight: 16 Oz
Author: Jimson Mathew, Kanchan Manna
Item Length: 9.3 in
Item Width: 6.1 in
Format: Hardcover