Digital System Test and Testable Design: Using HDL Models and Architectures by Z

Description: Digital System Test and Testable Design by Zainalabedin Navabi Estimated delivery 3-12 business days Format Hardcover Condition Brand New Description This book is about digital system testing and testable design. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Publisher Description This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies. Author Biography About the Author Dr. Zainalabedin Navabi is a professor of electrical and computer engineering at Worcester Polytechnic Institute. Dr. Navabi is the author of several textbooks and computer based trainings on VHDL, Verilog and related tools and environments. Dr. Navabis involvement with hardware description languages begins in 1976, when he started the development of a register-transfer level simulator for one of the very first HDLs. In 1981 he completed the development of a synthesis tool that generated MOS layout from an RTL description. Since 1981, Dr. Navabi has been involved in the design, definition and implementation of Hardware Description Languages. He has written numerous papers on the application of HDLs in simulation, synthesis and test of digital systems. He started one of the first full HDL courses at Northeastern University in 1990. Since then he has conducted many short courses and tutorials on this subject in the United States and abroad. In addition to being a professor, he is also a consultant to CAE companies. Dr. Navabi received his M.S. and Ph.D. from the University of Arizona in 1978 and 1891, and his B.S. from the University of Texas at Austin in 1975. He is a senior member of IEEE, a member of IEEE Computer Society, member of ASEE, and ACM. Details ISBN 1441975470 ISBN-13 9781441975478 Title Digital System Test and Testable Design Author Zainalabedin Navabi Format Hardcover Year 2010 Pages 435 Edition 2011th Publisher Springer-Verlag New York Inc. GE_Item_ID:137759110; About Us Grand Eagle Retail is the ideal place for all your shopping needs! With fast shipping, low prices, friendly service and over 1,000,000 in stock items - you're bound to find what you want, at a price you'll love! Shipping & Delivery Times Shipping is FREE to any address in USA. Please view eBay estimated delivery times at the top of the listing. Deliveries are made by either USPS or Courier. We are unable to deliver faster than stated. International deliveries will take 1-6 weeks. NOTE: We are unable to offer combined shipping for multiple items purchased. This is because our items are shipped from different locations. Returns If you wish to return an item, please consult our Returns Policy as below: Please contact Customer Services and request "Return Authorisation" before you send your item back to us. Unauthorised returns will not be accepted. Returns must be postmarked within 4 business days of authorisation and must be in resellable condition. Returns are shipped at the customer's risk. We cannot take responsibility for items which are lost or damaged in transit. For purchases where a shipping charge was paid, there will be no refund of the original shipping charge. Additional Questions If you have any questions please feel free to Contact Us. Categories Baby Books Electronics Fashion Games Health & Beauty Home, Garden & Pets Movies Music Sports & Outdoors Toys

Price: 138.92 USD

Location: Fairfield, Ohio

End Time: 2024-11-21T03:33:28.000Z

Shipping Cost: 0 USD